X-Fab Silicon Foundries has added 375V power transistors to the devices available from its 180nm deep trench isolation BCD-on-SoI platform chip fab. The second generation of its XT018 super-junction ...

PMOS transistors are less vulnerable to substrate noise since they’re placed in separate wells; designers implement guard rings to attenuate the substrate noise propagation. However, substrate noise ...

—The development of a process flow capable of demonstrating functionality of a monolithic complementary FET (CFET) transistor architecture is complex due to the need to vertically separate nMOS and ...

For years—decades, in fact—the NMOS transistor world has been on cruise control. NMOS is naturally faster and its performance has scaled better than PMOS. PMOS has had a cost advantage. But lately, it ...

Designers of electronics and communications systems are constantly faced with the challenge of integrating greater functionality on less silicon area. Many of the system blocks – such as power ...

Even as industry moves into the era of the high k metal gate (HKMG) and FinFET transistor, chipmakers continue to seek ways to improve device performance. One of the latest advances and the subject of ...

Austin, Texas – Intel Corp. and Texas Instruments Inc. process engineers are opening up about how they have strained-literally-to boost the performance of 90-nanometer silicon at only a marginal ...

Intel is in production with several 65-nm processors now, creating an inventory of commercial microprocessor products that will begin shipping early next year. At the IEDM conference, Intel showed die ...

While silicon based components dominate the electronics industry, their operational limits – imposed by silicon’s material properties – restrict the extent to which they can be used in harsh ...